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An apparatus includes an image buffer, a graphics buffer, a memory, a router, and a sensor interface. The apparatus further includes a memory controller for controlling transfer of image data from the image buffer to the memory via the router and for controlling transfer of graphics data from the memory to the graphics buffer via the router. The apparatus also includes an image controller simultaneously operable with the memory controller for controlling transfer of the image data from the sensor interface to the image buffer. Optionally, the sensor interface comprises a receiver and a transmitter. Optionally, the apparatus further includes a header buffer, and a header controller simultaneously operable with the memory controller for controlling transfer of header data from the sensor interface to the header buffer. The apparatus optionally further includes a sensor for communicating with the header controller via the sensor interface.