Maryland's Defense Patent Database

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Prioritizing resource utilization in multi-thread computing system

Patent image
NRL

One embodiment of the present invention prioritizes resource utilization in a multi-thread processor. A priority register stores thread information for P threads. The thread information includes P priority codes corresponding to the P threads, at least one of the P threads requesting use of at least one resource unit. A priority selector generates assignment signal to assign the at least one resource unit to the at least one of the P threads according to the P priority codes.

Inventors: 
Dennis, Jack B.
Patent Number: 
Technical domain: 
IT and Software
FIle Date: 
2009-04-08
Grant Date: 
2013-09-10
Grant time: 
1,616 days
Grant time percentile rank: 
29
Claim count percentile rank: 
4
Citations percentile rank: 
4
'Cited by' percentile rank: 
1
Assignee: 
US NAVY