Maryland's Defense Patent Database

The defense community in Maryland is an R&D powerhouse.

Use this database to see the innovative patents that are poised for commercialization.

System and method for packaging of high-voltage semiconductor devices

Patent image
CCDC ARL

A method and an electronic device structure comprising at least one access lead to adapted to be connected to an electrical circuit; at least one substrate region; at least one semiconductor die positioned on the substrate; the at least one semiconductor die being operatively connected to the at least one access lead; a dielectric region extending below the at least one semiconductor die; the dielectric region being formed by creating a cavity in the at least one substrate region; whereby the dielectric region operates to reduce electric field stresses produced by the at least one semiconductor die to thereby reduce the possibility of material failure and voltage breakdown. The method of making an electronic device structure comprises providing at least one substrate region; providing at least one semiconductor die located on the at least one substrate region; removing a portion of the at least one substrate region to provide a dielectric region within the substrate extending below the at least one semiconductor die; whereby the dielectric region within the at least one substrate region operates to reduce electric field stresses produced by the at least one semiconductor die to thereby reduce the possibility of material failure and voltage breakdown.

Inventors: 
Tipton IV, Charles Wesley; Ibitayo, Oladimeji O.
Patent Number: 
Technical domain: 
Materials and Coatings
FIle Date: 
2011-07-19
Grant Date: 
2013-10-01
Grant time: 
805 days
Grant time percentile rank: 
14
Claim count percentile rank: 
6
Citations percentile rank: 
1
'Cited by' percentile rank: 
1
Assignee: 
US ARMY