Maryland's Defense Patent Database

The defense community in Maryland is an R&D powerhouse.

Use this database to see the innovative patents that are poised for commercialization.

Bipolar stacked transistor architecture

Patent image
MRDC

An amplifier for an integrated circuit has a plurality of ratioed current mirrors connected to each other in a stacked configuration. Each ratio mirror has at least two resistors and at least two bipolar transistors connected to each other via said at least two resistors. Each amplifying transistor, contains a capacitor, and potentially and inductor, to internally match the transistors that make up the amplifying stack. DC, harmonic and s-parameter simulations are performed to provide an optimal impedance for each of the stacked transistors to maximize the RF power output of each stacked layer and the amplifier.

Inventors: 
Darwish, Ali; Farm, Thomas J.; Zaghloul, Mona
Patent Number: 
Technical domain: 
Communications
FIle Date: 
2012-03-22
Grant Date: 
2014-07-29
Grant time: 
859 days
Grant time percentile rank: 
15
Claim count percentile rank: 
7
Citations percentile rank: 
1
'Cited by' percentile rank: 
1
Assignee: 
GEORGE WASHINGTON UNIV