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A hybrid domain wall Hall cross device consists of a semiconductor Hall cross having a top surface and a pair of arms intersecting at a center region, and a ferromagnetic wire fabricated on the top surface, electrically isolated from the Hall cross, and having a constriction proximate to the center of the Hall cross. The device provides a magnetoelectronic MRAM storage cell with improved performance characteristics. Binary storage is associated with a trapped domain wall having one of two stable orientations. The bit state can be written using current driven domain wall motion. This is a STT process in which the write current is applied to a thin film, low impedance wire. Heating is minimized and no wear-out mechanism is known to exist.